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this is information on a product in full production. september 2014 docid026901 rev 1 1/31 RVND5T016ASP double channel high side driver with analog current sense datasheet - production data features ? general ? very low standby current ? 3.0 v cmos compatible input ? optimized electromagnetic emission ? very low electromagnetic susceptibility ? compliant with european directive 2002/95/ec ? fault reset standby pin (fr_stby) ? diagnostic functions ? proportional load current sense ? current sense precision for wide range currents ? off state open load detection ? output short to v cc detection ? overload and short to ground latch-off ? thermal shutdown latch-off ? very low current sense leakage ? protections ? undervoltage shutdown ? overvoltage clamp ? load current limitation ? self limiting of fast thermal transients ? protection against loss of ground and loss of v cc ? thermal shutdown ? reverse battery protected with self switch of the powermos ? electrostatic discharge protection ? aerospace and defense features ? dedicated traceability and part marking ? production parts approval documents available ? adapted extended life time and obsolescence management ? extended product change notification process ? designed and manufactured to meet sub ppm quality goals ? advanced mold and frame designs for superior resilience to harsh environment (acceleration, emi, thermal, humidity) ? single fabrication, assembly and test site ? dual internal production source capability application ? all types of resistive, inductive and capacitive loads in aerospace and defense applications. description the RVND5T016ASP is a device made using stmicroelectronics ? vipower ? technology, intended for driving resistive or inductive loads with one side connected to ground. active v cc pin voltage clamp protects the device against low energy spikes. this device integrates an analog current sense which delivers a current proportional to the load current. fault conditions such as overload, overtemperature or short to v cc are reported via the current sense pin. output current limitation protects the device in overload condition. the device will latch off in case of overload or thermal shutdown. the device is reset by a low level pass on the fault reset standby pin. a permanent low level on the inputs and fault reset standby pin disables all outputs and sets the device in standby mode. max transient supply voltage v cc 58 v operating voltage range v cc 8 to 36 v typ on-state resistance (per ch.) r on 16 m current limitation (typ) i lim 70 a off-state supply current i s 2 a (1) 1. typical value with all loads connected. 3rzhu62 *$3*36 www.st.com
contents RVND5T016ASP 2/31 docid026901 rev 1 contents 1 block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 2.5 maximum demagnetization energy (v cc = 24 v) . . . . . . . . . . . . . . . . . . . 21 3 package and pcb thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.1 powerso-16 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.1 ecopack ? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.2 powerso-16 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.3 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5 order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
docid026901 rev 1 3/31 RVND5T016ASP list of tables 3 list of tables table 1. pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 table 2. suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 table 3. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 4. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 5. power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 6. switching (vcc = 24v; tj = 25c) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 7. logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 8. protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 9. current sense (8 v < v cc < 36 v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 10. openload detection (fr_stby = 5 v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 table 11. truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 12. electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 table 13. electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 table 14. electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 table 15. thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 table 16. powerso-16 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 table 17. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 table 18. document revision history. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
list of figures RVND5T016ASP 4/31 docid026901 rev 1 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 4. t reset definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 figure 5. t stby definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 figure 6. output stuck to v cc detection delay time at fr_stby activation . . . . . . . . . . . . . . . . . . . . 14 figure 7. current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 figure 8. open-load off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 9. switching characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 10. delay response time between rising edge of output current and rising edge of current sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 11. output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 12. device behavior in overload condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 13. off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 14. high level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 15. input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 16. input low level voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 17. input high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 18. input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 19. on-state resistance vs t case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 20. on-state resistance vs v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 21. i limh vs t case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 22. turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 23. turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 24. maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 25. powerso-16 pc board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 26. rthj-amb vs pcb copper area in open box free air condition (one channel on) . . . . . . . . 22 figure 27. powerso-16 thermal impedance junction ambient single pulse (one channel on) . . . . . . 23 figure 28. thermal fitting model of a double channel hsd in powerso-16 . . . . . . . . . . . . . . . . . . . . 23 figure 29. powerso-16 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 30. powerso-16 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 figure 31. powerso-16 tape and reel shipment (suffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 figure 32. powerso-16 suggested pad layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
docid026901 rev 1 5/31 RVND5T016ASP block diagram and pin description 30 1 block diagram and pin description figure 1. block diagram table 1. pin function name function v cc battery connection outn power output gnd ground connection inn voltage controlled input pin with hysteresis, cmos-compatible; they control output switch state csn analog current sense pin, they deliver a current proportional to the load current fr_stby in case of latch-off for overtemperature/overcurrent condition, a low pulse on the fr_stby pin is needed to reset the channel. the device enters in standby mode if all inputs and the fr_stby pin are low. &rqwuro 'ldjqrvwlf 9 && &+ &rqwuro 'ldjqrvwlf /2*,& '5,9(5 9 21 /lplwdwlrq &xuuhqw /lplwdwlrq 3rzhu &odps 2))6wdwh 2shqordg 2yhu whpshudwxuh 8qghuyrowdjh 9 6(16(+ &xuuhqw 6hqvh &+ 29(5/2$'3527(&7,21 $&7,9(32:(5/,0,7$7,21 ,1 ,1 &6 &6 )5b6we\ *1' 287 287 6ljqdo&odps 5hyhuvh %dwwhu\ 3urwhfwlrq ("1($'5
block diagram and pin description RVND5T016ASP 6/31 docid026901 rev 1 figure 2. configuration diagram (top view) table 2. suggested connections for unused and not connected pins connection / pin current sense n.c. output input fr_stby floating not allowed x (1) 1. x: do not care. xx x to ground through 10 k ? resistor x not allowed through 10 k ? resistor through 10 k ? resistor 9 && 287 ,1 *1' &6 1& )5b6we\ 1& &6 ,1 287 287 287 287 287 287 287 *$3*36
docid026901 rev 1 7/31 RVND5T016ASP electrical specifications 30 2 electrical specifications figure 3. current and voltage conventions 2.1 absolute maximum ratings stressing the device above the ratings listed in table 3 may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. exposure to the conditions reported in this section for extended periods may affect device reliability. , 6 , *1' 9 && 9 && 287q , 287q &6q , 6(16(q ,1q , ,1q *1' , )5b6we\ 9 )5b6we\ 9 ,1q 9 6(16(q 9 287q 9 )q )5b6we\ *$3*36 table 3. absolute maximum ratings symbol parameter value unit v cc dc supply voltage 58 v -v cc reverse dc supply voltage 32 v i out dc output current internally limited a -i out reverse dc output current 45 a i in dc input current -1 to 10 ma i fr_stby fault reset standby dc input current -1 to 1.5 ma v csense current sense maximum voltage v cc -58 to +v cc v e max maximum switching energy (l = 11 mh; v bat = 32 v; t jstart = 150c; i out = 5.3 a) 320 mj l smax maximum stray inductance in short circuit condition r l = 300 m ; v bat = 32 v; t jstart = 150c; i out = i limh_max 40 h
electrical specifications RVND5T016ASP 8/31 docid026901 rev 1 2.2 thermal data v esd electrostatic discharge (human body model: r = 1.5 k ?? c = 100 pf) ? input ? current sense ? fault reset standby pin ? output ?v cc 4000 2000 4000 5000 5000 v v v v v v esd charge device model (cdm-aec-q100-011) 750 v t j junction operating temperature -40 to 150 c t stg storage temperature -55 to 150 c table 3. absolute maximum ratings (continued) symbol parameter value unit table 4. thermal data symbol parameter value unit r thj-case thermal resistance junction-case (max.) (with one channel on) 1.5 c/w r thj-amb thermal resistance junction-ambient (max.) see figure 26 c/w
docid026901 rev 1 9/31 RVND5T016ASP electrical specifications 30 2.3 electrical characteristics 8 v < v cc < 36 v; -40c < t j < 150c, unless otherwise specified. table 5. power section symbol parameter test conditions min. typ. max. unit v cc operating supply voltage 8 24 36 v v usd undervoltage shutdown 3.5 5 v v usdhyst undervoltage shutdown hysteresis 0.5 v r on on state resistance (1) 1. for each channel i out = 5 a; t j = 25c; 8 v < v cc < 36 v 16 m ? i out = 5 a; t j = 150c; 8 v < v cc < 36 v 32 r on rev reverse battery on state resistance v cc = -24 v; i out = -5 a; t j = 25c 16 m v clamp clamp voltage i s = 20 ma 58 64 70 v i s supply current off-state; v cc = 24 v; t j = 25c; v in = v out = v sense = 0 v 2 (2) 2. powermos leakage included. 5 a on-state; v cc = 24 v; v in = 5 v; i out = 0 a 4.5 6.5 ma i l(off1) off state output current v in = v out = 0 v; v cc = 24 v; t j = 25c 0 0.01 3 a v in = v out = 0 v; v cc = 24 v; t j = 125c 05 table 6. switching (v cc = 24v; t j = 25c) symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time r l = 4.8 ?50? s t d(off) turn-off delay time r l = 4.8 ?45? s dv out /dt (on) turn-on voltage slope r l = 4.8 0.65 v ? s dv out /dt (off) turn-off voltage slope r l = 4.8 0.6 v ? s w on switching energy losses during t won r l = 4.8 ? 2.1 ? mj w off switching energy losses during t woff r l = 4.8 ? 0.9 ? mj
electrical specifications RVND5T016ASP 10/31 docid026901 rev 1 figure 4. t reset definition table 7. logic inputs symbol parameter test conditions min. typ. max. unit v il input low level voltage 0.9 v i il low level input current v in = 0.9 v1 a v ih input high level voltage 2.1 v i ih high level input current v in = 2.1 v10 a v i(hyst) input hysteresis voltage 0.25 v v icl input clamp voltage i in = 1 ma 5.5 7 v i in = -1 ma -0.7 v fr_stby_l fault_reset_standby low level voltage 0.9 v i fr_stby_l low level fault_reset_standby current v fr_stby = 0.9 v1 a v fr_stby_h fault_reset_standby high level voltage 2.1 v i fr_stby_h high level fault_reset_standby current v fr_stby = 2.1 v10 a v fr_stby (hyst) fault_reset_standby hysteresis voltage 0.25 v v fr_stby_cl fault_reset_standby clamp voltage i fr_stby = 15 ma (10 ms) 11 15 v i fr_stby = -1 ma -0.7 t reset overload latch-off reset time see figure 5 224 s t stby standby delay see figure 4 120 1200 s )5b67%< ,1 287387 &6 2yhuordg &kdqqho 7buhvhw *$3*36
docid026901 rev 1 11/31 RVND5T016ASP electrical specifications 30 figure 5. t stby definition table 8. protections and diagnostics symbol parameter test conditions min. typ. max. unit i limh dc short circuit current v cc = 24 v457090a 5 v < v cc < 36 v90a i liml short circuit current during thermal cycling v cc = 24 v; t r < t j < t tsd 16 a t tsd shutdown temperature 150 175 200 c t r reset temperature t rs + 1t rs + 5c t rs thermal reset of status 135 c t hyst thermal hysteresis (t tsd - t r )7c v demag turn-off output voltage clamp i out = 5 a; v in = 0 v; l = 6 mh v cc - 58 v cc - 64 v cc - 70 v v on output voltage drop limitation i out = 500 ma 25 mv w vwe\ w vwe\ )5b6wge\ ,1387q ,*1' *$3*&)7
electrical specifications RVND5T016ASP 12/31 docid026901 rev 1 table 9. current sense (8 v < v cc < 36 v) symbol parameter test conditions min. typ. max. unit dk led /k led(tot) (1) current sense ratio drift i out = 12 ma to 100 ma; i cal = 50 ma; v sense = 0.5 v -50 50 % k 0 i out /i sense i out = 100 ma; v sense = 0.5 v; t j = -40c to 150c 1185 5770 10760 dk 0 /k 0 (1) current sense ratio drift i out = 100 ma; v sense = 0.5 v; t j = -40c to 150 c -25 25 % k 1 i out /i sense i out = 0.6 a; v sense = 1 v; t j = -40c...150c t j = 25c...150c 2225 3000 5350 8580 7500 dk 1 /k 1 (1) current sense ratio drift i out = 0.6 a; v sense = 1 v; t j = -40c to 150c -20 20 % k 2 i out /i sense i out = 1.6 a; v sense = 1 v; t j = -40c to 150c t j = 25c to 150c 2935 3250 4650 7305 6200 dk 2 /k 2 (1) current sense ratio drift i out = 1.6 a; v sense = 1 v; t j = -40c to 150c -22 17 % k 3 i out /i sense i out = 2.4 a; v sense = 2 v; t j = -40c to 150c t j = 25c to 150c 2800 2955 4200 6680 5560 dk 3 /k 3 (1) current sense ratio drift i out = 2.4 a; v sense = 2 v; t j = -40c to 150c -16 23 % k 4 i out /i sense i out = 3 a; v sense = 4 v; t j = -40c to 150c t j = 25c to 150c 2850 3170 4200 6000 5270 dk 4 /k 4 (1) current sense ratio drift i out = 3 a; v sense = 4 v; t j = -40c to 150c -17 17 % k 5 i out /i sense i out = 4.2 a; v sense = 4 v; t j = -40c to 150c t j = 25c to 150c 3200 3450 4200 5400 4965 dk 5 /k 5 (1) current sense ratio drift i out = 4.2 a; v sense = 4 v; t j = -40c to 150c -13 13 % k 6 i out /i sense i out = 20 a; v sense = 4 v; t j = -40c to 150c 3940 4200 4535 dk 6 /k 6 (1) current sense ratio drift i out = 20 a; v sense = 4 v; t j = -40c to 150c -4 4 % dk/k bulb1(tot) (1) current sense ratio drift i out = 1.6 a to 4.2 a; i outcal = 3 a; v sense = 2 v -15 50 % dk/k bulb2(tot) (1) current sense ratio drift i out = 0.6 a to 2.4 a; i outcal = 1.2 a; v sense = 2 v -30 25 % i sense0 analog sense leakage current i out = 0 a; v sense = 0 v; v in = 0 v; t j = -40c to 150c 01 a i out = 0 a; v sense = 0 v; v in = 5 v; t j = -40c to 150c 02
docid026901 rev 1 13/31 RVND5T016ASP electrical specifications 30 v sense max analog sense output voltage i out = 20 a; r sense = 3.9 k 5v v senseh analog sense output voltage in fault condition (2) v cc = 24 v; r sense = 3.9 k 8v i senseh analog sense output current in fault condition (2) v cc = 24 v; v sense = 5 v 9 12 ma t dsense2h delay response time from rising edge of input pin v sense < 4 v; 0.5 a < i out < 20 a; i sense = 90% of i sense max (see figure 7 ) 300 600 s ? t dsen se 2h delay response time between rising edge of output current and rising edge of current sense v sense < 4v; i sense = 90% of i sensemax, i out = 90% of i outmax i outmax = 5a (see figure 10 ) 450 s t dsense2l delay response time from falling edge of input pin v sense < 4 v; 0.5 a < i out < 20 a; i sense =10% of i sense max (see figure 7 ) 520 s 1. parameter guaranteed by design; it is not tested. 2. fault condition includes: power limitation, overtemperature and open load in off-state condition. table 10. openload detection (fr_stby = 5 v) symbol parameter test conditions min. typ. max. unit v ol openload off state voltage detection threshold v in = 0 v; 8 v < v cc < 36 v2 4 v t dstkon output short circuit to vcc detection delay at turn off see figure 8 . 180 1800 s i l(off2) off state output current at v out = 4 v v in = 0 v; v sense = 0 v; v out rising from 0 v to 4 v -120 0 a t d_vol delay response from output rising edge to v sense rising edge in openload v out = 4 v; v in = 0 v; v sense = 90% of v senseh r sense = 3.9 k ? 20 s t dfrstk_on output short circuit to v cc detection delay at fr_stby activation see figure 6 ; input 1,2 = low 50 s table 9. current sense (8 v < v cc < 36 v) (continued) symbol parameter test conditions min. typ. max. unit
electrical specifications RVND5T016ASP 14/31 docid026901 rev 1 figure 6. output stuck to v cc detection delay time at fr_stby activation figure 7. current sense delay characteristics figure 8. open-load off-state delay timing w ')567.b21 )5 67%< 9 &6 9 vhqvh+ ,qsxw /rz *$3*&)7 6(16(&855(17 ,1387 /2$'&855(17 w '6(16(+ w '6(16(/ *$3*&)7 9 ,1 9 &6 w '67.21 287387 678&. 72 9 && 9 287 !9 2/ 9 6(16(+ :lwk )5b6we\ 9 *$3*36
docid026901 rev 1 15/31 RVND5T016ASP electrical specifications 30 figure 9. switching characteristics 9 287 g9 287 gw rq w u w i 7 grii ,1387 w w 7 grq g9 287 gw rii *$3*&)7 w :rq w :rii
electrical specifications RVND5T016ASP 16/31 docid026901 rev 1 figure 10. delay response time between rising edge of output current and rising edge of current sense figure 11. output voltage drop limitation 9 ,1 , 287 , 2870$; , 2870$; w w w , 6(16(0$; ?w '6(16(+ , 6(16( , 6(16(0$; *$3*&)7 9 21 , 287 7 m ?& 7 m ?& 7 m ?& 9 21 5 21 7 9 && 9 287 $*9
docid026901 rev 1 17/31 RVND5T016ASP electrical specifications 30 figure 12. device behavior in overload condition )$8/7b5(6(7 ,1 q 287387 q &6 q 29(5/2$' &+$11(/ q 9 vhqvh+ ryhuordg ryhuordguhvhw ryhuordggldjuhvhw wbuhvhw wbuhvhw *$3*&)7 287387 q dqg&6 q frqwuroohge\,1q )$8/7b5(6(7iurp?wr?:qrdfwlrqrq&6 q slq ryhuordgodwfkrii,qqkljk:&6 q kljk )$8/7b5(6(7orz$1'7hpsfkdqqhoqryhuordgbuhvhw:ryhuord godwfkuhvhwdiwhuwbuhvhw wr)$8/7b5(6(7orz$1',1 q kljk:wkhupdof\folqj&6 q kljk )$8/7b5(6(7kljk:odwfkriiuhvhwglvdeohg wrryhuordghyhqwdqg)$8/7b5(6(7kljk:odwfkriiqrwkh updof\folqj wrryhuordggldjqrvwlfglvdeohghqdeohge\wkhlqsxw ryhuordgodwfkriiuhvhwe\)$8/7b5(6(7 29(5/2$' wkhupdovkxwgrzq25srzhuolplwdwlrq table 11. truth table conditions fault reset standby input output sense standby l l x 0 normal operation x x l h l h 0 nominal overload x x l h l h 0 > nominal overtemperature / short to ground x l h l h h l cycling latched 0 v senseh v senseh undervoltage x x l 0 short to v bat l h x l l h h h h 0 v senseh < nominal open load off-state (with pull-up) l h x l l h h h h 0 v senseh 0 negative output voltage clamp x l negative 0
electrical specifications RVND5T016ASP 18/31 docid026901 rev 1 table 12. electrical transient requirements (part 1) iso 7637-2: 2004(e) test pulse test levels (1) 1. the above test levels must be considered referred to v cc = 24.5 v except for pulse 5b number of pulses or test times burst cycle/pulse repetition time delays and impedance iii iv 1 - 450 v - 600 v 5000 pulses 0.5 s 5 s 1 ms, 50 2a + 37 v + 50 v 5000 pulses 0.2 s 5 s 50 s, 2 3a - 150 v - 200 v 1h 90 ms 100 ms 0.1 s, 50 3b + 150 v + 200 v 1h 90 ms 100 ms 0.1 s, 50 4 - 12 v - 16 v 1 pulse 100 ms, 0.01 5b (2) 2. valid in case of external load dump clamp: 58 v maximum referred to ground. + 123 v + 174 v 1 pulse 350 ms, 1 table 13. electrical transient requirements (part 2) iso 7637-2: 2004(e) test pulse test level results iii iv 1c c (1) 1. with r load < 24 ?? 2a c c 3a c c 3b (2) 2. without capacitor betweeen v cc and gnd. ee 3b (3) 3. with 10 nf betweeen v cc and gnd. cc 4c c 5b (4) 4. external load dump clamp, 58 v maximum, referred to ground. cc table 14. electrical transient requirements (part 3) class contents c all functions of the device are performed as designed after exposure to disturbance. e one or more functions of the device are not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
docid026901 rev 1 19/31 RVND5T016ASP electrical specifications 30 2.4 electrical characteristics curves figure 13. off-state output current figure 14. high level input current figure 15. input clamp voltage figure 16. input low level voltage figure 17. input high level voltage figure 18. input hysteresis voltage 7f>?&@ ,orii>x$@ ("1($'5 2ii6wdwh 9ff 9 9lq 9rxw 7f>?&@ ,lk>x$@ 9lq 9 ("1($'5 ("1($'5 7f>?&@ 9lfo>9@ ,lq p$ ("1($'5 7f>?&@ 9lo>9@ ("1($'5 7f>?&@ 9lk>9@ ("1($'5 7f>?&@ 9lk\vw>9@
electrical specifications RVND5T016ASP 20/31 docid026901 rev 1 figure 19. on-state resistance vs t case figure 20. on-state resistance vs v cc figure 21. i limh vs t case figure 22. turn-on voltage slope figure 23. turn-off voltage slope 7f>?&@ 5rq>p2kp@ ,rxw $ 9ff 9 ("1($'5 ("1($'5 9ff>9@ 5rq>p2kp@ 7f ?& 7f ?& 7f ?& 7f ?& ("1($'5 7f>?&@ ,olpk>$@ 9ff 9 ("1($'5 7f>?&@ g9rxwgw2q>9xv@ 9ff 9 5o ("1($'5 7f>?&@ g9rxwgw2ii>9xv@ 9ff 9 5o
docid026901 rev 1 21/31 RVND5T016ASP electrical specifications 30 2.5 maximum demagnetization energy (v cc = 24 v) figure 24. maximum turn-off current versus inductance note: values are generated with r l = 0 . in case of repetitive pulses, t jstart (at the beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves a and b. c: t jstart = 125c repetitive pulse a: t jstart = 150c single pulse b: t jstart = 100c repetitive pulse 'hpdjqhwl]dwlrq 'hpdjqhwl]dwlrq 'hpdjqhwl]dwlrq w 9 ,1 , / *$3*&)7 ,$ /p+ 91'7$ 63 6lqjoh 3xovh 5hshwlwlyhsxovh7mvwduw ?& 5hshwlwlyhsxovh7mvwduw ?& ("1($'5 " " " # $
package and pcb thermal data RVND5T016ASP 22/31 docid026901 rev 1 3 package and pcb thermal data 3.1 powerso-16 thermal data figure 25. powerso-16 pc board 1. layout condition of r th and z th measurements (board finish thickness 1.6 mm +/- 10%; board double layer; board dimension 77 mm x 86 mm; board material fr4; cu thickness 70 m (front and back side); thermal vias separation 1.2 mm; thermal via diameter 0.3 mm +/- 0.08 mm; cu thickness on vias 0.025 mm ). figure 26. r thj-amb vs pcb copper area in open box free air condition (one channel on) ("1($'5 24(j?amb?#7 0#"#uheatsinkareacm> 24(j?ambvs#uheatsinkarea 24(jamb '!0'#&4
docid026901 rev 1 23/31 RVND5T016ASP package and pcb thermal data 30 figure 27. powerso-16 thermal impedance junction ambient single pulse (one channel on) figure 28. thermal fitting model of a double channel hsd in powerso-16 1. the fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered. equation 1: pulse calculation formula where ? = t p /t =7+?&: 7lphv &x fp &x fp &x irrwsulqw ("1($'5 z th ? r th ? z thtp 1 ? ? ?? + ? =
package and pcb thermal data RVND5T016ASP 24/31 docid026901 rev 1 table 15. thermal parameters area/island (cm 2 ) footprint 2 8 r1 = r7 (c/w) 0.1 r2 = r8 (c/w) 0.5 r3 (c/w) 2 r4 (c/w) 7 r5 (c/w) 12 12 8 r6 (c/w) 22 18 12 c1 = c7 (w.s/c) 0.01 c2 = c8 (w.s/c) 0.05 c3 (w.s/c) 0.5 c4 (w.s/c) 2 c5 (w.s/c) 3 4 7 c6 (w.s/c) 5 6 12
docid026901 rev 1 25/31 RVND5T016ASP package information 30 4 package information 4.1 ecopack ? in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www .st.com . ecopack ? is an st trademark. 4.2 powerso-16 mechanical data figure 29. powerso-16 package dimensions 34 *$3*36
package information RVND5T016ASP 26/31 docid026901 rev 1 table 16. powerso-16 mechanical data dim. mm min. typ. max. a1 0 0.05 0.1 a2 3.4 3.5 3.6 a3 1.2 1.3 1.4 a4 0.15 0.2 0.25 a 0.2 b 0.27 0.35 0.43 c 0.23 0.27 0.32 d 9.4 9.5 9.6 d1 7.4 7.5 7.6 d 0 0.05 0.1 e (1) 13.85 14.1 14.35 e1 9.3 9.4 9.5 e2 7.3 7.4 7.5 e3 5.9 6.1 6.3 e 0.8 e1 5.6 f 0.5 g 1.2 l 0.8 1 1.1 r1 0.25 r2 0.8 t 2 5 8 t1 6 (typ.) t2 10 (typ.) package weight (typ.)
docid026901 rev 1 27/31 RVND5T016ASP package information 30 4.3 packing information figure 30. powerso-16 tube shipment (no suffix) figure 31. powerso-16 tape and reel shipment (suffix ?tr?) $ % & *$3*36 all dimensions are in mm. base q.ty 50 bulk q.ty 1000 a 4.9 b 17.2 c ( 0.1) 0.8 tube length ( 0.5) 532 5((/',0(16,216 $oo glphqvlrqv duh lq pp %dvhtw\ %xontw\ $pd[ %plq &? ) * 1plq 7pd[ 7$3(',0(16,216 $ffruglqj wr (ohfwurqlf ,qgxvwulhv $vvrfldwlrq (,$ 6wdqgdug uhy $ )he $oo glphqvlrqv duh lq pp 7dshzlgwk : 7dshkrohvsdflq j 3? &rpsrqhqwvsdflqj 3 +rohgldphwhu ' +rohgldphwhu 'plq +rohsrvlwlrq )? &rpsduwphqwghswk .pd[ +rohvsdflqj 3? 7r s fryhu wdsh (qg 6wduw 1r frpsrqhqwv 1r frpsrqhqwv &rpsrqhqwv pp plq pp plq (psw\ frpsrqhqwv srfnhwv vdohg zlwk fryhu wdsh 8vhu gluhfwlrq ri ihhg *$3*36
package information RVND5T016ASP 28/31 docid026901 rev 1 figure 32. powerso-16 suggested pad layout ("1($'5
docid026901 rev 1 29/31 RVND5T016ASP order codes 30 5 order codes table 17. device summary package order codes tube tape and reel powerso-16 RVND5T016ASP RVND5T016ASPtr
revision history RVND5T016ASP 30/31 docid026901 rev 1 6 revision history table 18. document revision history date revision changes 16-sep-2014 1 initial release.
docid026901 rev 1 31/31 RVND5T016ASP 31 important notice ? please read carefully stmicroelectronics nv and its subsidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant in formation on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of o rder acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2014 stmicroelectronics ? all rights reserved

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